The present invention relates in general to integrated circuits and, more particularly, to programmable analog arrays.
Programmable analog arrays are integrated circuits that include a plurality of programmable analog cells that perform analog operations such as amplifying, filtering, etc., on analog signals. The analog signals are transferred among the programmable analog cells on interconnect paths formed in routing channels between adjacent cells.
The analog operations are executed by active circuits such as amplifiers or comparators typically controlled by ratios of programmable capacitors. Each programmable capacitor includes an array of capacitors coupled in series with analog switching devices such as transmission gates that couple the capacitors to the active circuit. The switching devices are enabled by binary control words stored in memory to produce proportional capacitances that control the analog operations.
Prior art switchable capacitor arrays include a unit capacitor that produces a minimum capacitance corresponding to a least-significant bit of the controlling binary word. Higher order capacitors are derived by interconnecting matching sets of individual unit capacitors to produce a desired capacitance value. For example, a third-order capacitor is implemented as eight individual unit capacitors which are interconnected to form a single capacitor whose nominal capacitance is 2.sup.3 =8 times the unit capacitance.
A problem with prior art programmable analog arrays is the large amount of die area consumed by the binary weighted capacitor arrays. A large number of unit capacitors is needed for implementing even relatively low resolutions of programmable capacitance. For example, an eight-bit binary word is used to control an array comprising 2.sup.8 -1=255 unit capacitors. Moreover, several such programmable capacitor arrays may be used for controlling the operation of each active circuit.
Hence, there is a need for a circuit and method for executing analog operations with an active circuit controlled by an array of switched capacitors in a reduced amount of die area.